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Search: "[ keyword: Phase-locked loop ]" (16)
Effects of Input Harmonics, DC Offset and Step Changes of the Fundamental Component on Single-Phase EPLL and Elimination
Linsong Luo Huixin Tian Fengjiang Wu
Vol. 15, No. 4, pp. 1085-1092, Jul. 2015
10.6113/JPE.2015.15.4.1085
Vol. 15, No. 4, pp. 1085-1092, Jul. 2015
10.6113/JPE.2015.15.4.1085
A Novel Single Phase Synchronous Reference Frame Phase-Locked Loop with a Constant Zero Orthogonal Component
Ming Li Yue Wang Xiong Fang Yuan Gao Zhaoan Wang
Vol. 14, No. 6, pp. 1334-1344, Nov. 2014
10.6113/JPE.2014.14.6.1334
Vol. 14, No. 6, pp. 1334-1344, Nov. 2014
10.6113/JPE.2014.14.6.1334
Adaptive Neural PLL for Grid-connected DFIG Synchronization
Ali Bechouche Djaffar Ould Abdeslam Tahar Otmane-Cherif Hamid Seddiki
Vol. 14, No. 3, pp. 608-620, May 2014
10.6113/JPE.2014.14.3.608
Vol. 14, No. 3, pp. 608-620, May 2014
10.6113/JPE.2014.14.3.608
Fourier-Based PLL Applied for Selective Harmonic Estimation in Electric Power Systems
Claudio H. G. Santos Reginaldo V. Ferreira Sidelmo Magalhaes Silva Braz J. Cardoso Filho
Vol. 13, No. 5, pp. 884-895, Sep. 2013
10.6113/JPE.2013.13.5.884
Vol. 13, No. 5, pp. 884-895, Sep. 2013
10.6113/JPE.2013.13.5.884
A Dual-Output Integrated LLC Resonant Controller and LED Driver IC with PLL-Based Automatic Duty Control
HongJin Kim SoYoung Kim Kang-Yoon Lee
Vol. 12, No. 6, pp. 886-894, Nov. 2012
10.6113/JPE.2012.12.6.886
Vol. 12, No. 6, pp. 886-894, Nov. 2012
10.6113/JPE.2012.12.6.886
Three-Phase Line-Interactive Dynamic Voltage Restorer with a New Sag Detection Algorithm
Jong-Kyou Jeong Ji-Heon Lee Byung-Moon Han
Vol. 10, No. 2, pp. 203-209, Mar. 2010
10.6113/JPE.2010.10.2.203
Vol. 10, No. 2, pp. 203-209, Mar. 2010
10.6113/JPE.2010.10.2.203